cc merge -merge_hierarchies -dir $DSN\coverage1 -dir $DSN\coverage2
-dest $DSN\coverage_merged
7.12 Merge Code Coverage Data
You can also merge the Code Coverage Data on the ‘per-unit’ basis. Using this technique, information for the units will be combined regardless of their location in hierarchy.
cc merge -merge -dir $DSN\coverage1 -dir $DSN\coverage2
-dest $DSN\coverage_merged
Toggle Coverage
Toggle Coverage is a tool integrated within Active-HDL.
Toggle Coverage measures design activity in terms of changes of signal logic values.
It efficiently helps to verify the quality of the stimulus and locate "dead" structures of the design. Signals that were not initialized during simulation or are not exercised properly by the testbench can be easily identified.
7.13 Enabling Toggle Coverage
To enable Toggle Coverage session you have to:
• Initialize simulation session
• Use toggle command to start Toggle coverage session. Signals that should be monitored have to be specified explicitly in the command line (use of wildcards is allowed).
asim bjack_tb
toggle -toggle_type full /UUT/I17/*
• A report is written automatically to the ./toggle subfolder when the endsim command is used or when the Toggle Coverage engine is switched off with the toggle –off command.
7.14 Toggle Coverage modes
The Toggle Coverage engine can generate four different types of reports:
• Init mode
• Assign mode
• Full mode
• Activity mode
The mode is specified with the –toggle_type switch.
7.15 Toggle Coverage - Init mode
The Init mode (-toggle_type init) checks if selected signals have been at least once set to ‘0’ or ‘1’ value. This mode is useful to verify whether selected signals were initialized or not.
Please open the toggle_example design and execute run_init_mode.do macro. This macro invokes toggle coverage with proper switches listed below:
toggle -toggle_type init -rec /*
7.16 Toggle Coverage - Init mode
After execution of run_init_mode.do macro appropriate toggle coverage report file is generated and then displayed in HDL Editor window. You can check that some signals, e.g. D_L and D_H have not been properly initialized:
RESULTS
Signal Name Toggled
BUST YES
D_H [1:0] NO
D_L [3:0] NO
END_SIM YES
GEN_CLK YES
GEN_RES YES
HOLD YES
7.17 Toggle Coverage - Assign mode
The Assign mode provides information on how many pulses happened on a signal while the signal was being monitored.
In Verilog designs, the Toggle Coverage counts 0 and 1 pulses. For VHDL the L and H values of the std_ulogic type are also included in the statistics.
To invoke gathering assign data for the NEW_CARD signal, please execute run_assign_mode.do macro:
toggle -toggle_type assign NEW_CARD
7.18 Toggle Coverage - Assign mode
After execution of run_assign_mode.do macro, a new toggle coverage report file is generated.
This mode, for example, can be used to count
how many times action “new card” is executed:
RESULTS
Signal Name Toggled "0" assigns "1" assigns
NEW_CARD YES 15 15
7.19 Toggle Coverage - Full mode
In the Full mode signals are checked to detect if both rising and falling edges occurred.
Additionally, the edge definition can be customized with the -posedge/-negedge switch.
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