The DSP has general-purpose and dedicated registers in each of its functional blocks, страница 17

A C ’97 C od e c Re g iste r Sp a c e , Se c ond a ry C od e c 2

(A C 97EX T2) Re g iste r

Table B-20. AC’97 External Codec Space 2 Registers

PCI DMA Address, Count Registers

The PCI DMA registers described in the following sections refer to the Address generator block (shown in Figure B-1 on page B-3) for PCI Bus Mastering. Use these registers to specify general addressing information.

DMA C ontrol Re g iste rs

These registers control bus mastering transactions.

PC I DMA C ontrol Re g iste rs

All four PCI DMA control registers, listed below, share the same bit structure and bit descriptions. Refer to “Setting I/O Processor—Host Port Modes” on page 7-12 for descriptions of the bits in these registers.

•  DMA PCI Control/Status - PCI DMA Channel Control (Rx0) Register

•  DMA PCI Control/Status-Transmit (Tx0)

•  DMA PCI Control/Status (Rx1)

•  DMA PCI Control/Status (Tx1)

! None of the PCI DMA control registers can be reset.

PCI Interrupt, Control Registers

Use the PCI registers to access the PCI DSP interface.

Table B-21. PCI Interrupt Control Registers

Table B-21. PCI Interrupt Control Registers (Continued)

DMA Tra nsfe r C ount 0 - Bus Ma ste r Sa m p le Tra nsfe r C ount

(PC I_MSTRC NT0) Re g iste r

This 16-bit register contains a count of the number of words to be transferred between PCI address space and the DSP internal memory. ! All bits in this register reset to 0.