The DSP has general-purpose and dedicated registers in each of its functional blocks, страница 15

CardBus Function Event Force (CB_FEFx) Register

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

Table B-16. CB_FEFx Register Bit Descriptions

Bit Position

Bit Name

Description

3:0

Reserved

4

GWKF

Wakeup Force.

Sets the CB_FE0:GWAKE bit in the Function Event register (equivalent to PME_Status). Does not affect the state of CB_FPS0:GWAKE in the Function Present State register.

14:5

Reserved

15

INTF

Interrupt Force.

Sets the CB_FE0:INTRE bit in the Function Event register.

Does not affect the CB_FPS0:INTR bit in the Function Present State register.

A C ’97 C ontroller Re g iste rs

These control registers for the serial port are used for audio (sound) and modem, specifically V.90 modems under codec control.

Table B-17. AC’97 Control Registers

Register

Name

Description

PCI Address

USB Address

DSP

I/O

Page

DSP

I/O

Address

AC97LCTL

AC’97 Link

Control

Setup control for

AC’97 interface

0x0C1-0x0C0

0x00C1-0x00C0

0x00

0xC0

AC97STAT

AC’97 Link

Status

Setup control for

AC’97 interface

0x0C3-0x0C2

0x00C3-0x00C2

0x00

0xC2

AC97SEN

AC’97 Slot

Enable Register

Setup control for

AC’97 interface

0x0C5-0x0C4

0x00C5-0x00C4

0x00

0xC4

AC97SVAL

AC’97 Input Slot

Valid

Current status of valid frame from

AC’97 link

0x0C7-0x0C6

0x00C7-0x00C6

0x00

0xC6

AC97SREQ

AC’97 Slot

Request

Current status of AC’97 slot requests

0x0C9-0x0C8

0x00C9-0x00C8

0x00

0xC8

Table B-17. AC’97 Control Registers (Continued)

Register

Name

Description

PCI Address

USB Address

DSP

I/O

Page

DSP

I/O

Address

AC97SIF

AC’97 External

GPIO Status

Register

GPIO slot 12 interface register

0x0CB-0x0CA

0x00CB-0x00CA

0x00

0xCA

A C ’97 Link C ontrol/Sta tus Re g iste r (A C 97LC TL)

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

A C ’97 Link Sta tus Re g iste r (A C 97STA T)

The following illustration shows the AC’97 Link Status Register Bit Definitions

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

! All the bits in this register reset to zero.

A C ’97 Slot Ena b le Re g iste r (A C 97SEN)