Другие предметы \ Радиоприемные устройства связи и вещания

Host (pci/usb) port. Over view. Host Port Selection. Configuration Spaces. PCI Configuration Space, страница 23

Table 8-30. USB DSP Register Definitions (Continued)

Page	Address	Name
0x0C	0x78-0x79	DSP Memory Buffer WR Offset EP11
0x0C	0x80-0x81	USB Descriptor Vendor ID
0x0C	0x84-0x85	USB Descriptor Product ID
0x0C	0x86-0x87	USB Descriptor Release Number
0x0C	0x88-0x89	USB Descriptor Device Attributes

15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
X	X	X	X	X	X	X	X	X	X	X	X	X	X	DS	BA

most significant word

15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
BA	BA	BA	BA	BA	BA	BA	BA	BA	BA	BA	BA	BA	BA	BA	BA

least significant word

Figure 8-18. DSP Memory Buffer Base Addr Register

The DSP Memory Buffer Base Addr Register points to the base address for the DSP memory buffer assigned to this Endpoint.

Table 8-31. DSP Memory Buffer Base Addr Register

		[DS, BA16:0]				Memory Buffer Base Address
		DS				DSP Memory select bit. 0 = DSP1 memory space, 1 = DSP2 memory space
		BA[16:0]				Lower 17 address bits
15	14		13	12	11		10	9	8	7	6	5	4	3	2	1	0
SZ	SZ		SZ	SZ	SZ		SZ	SZ	SZ	SZ	SZ	SZ	SZ	SZ	SZ	SZ	SZ

Figure 8-19. DSP Memory Buffer Size Register

The DSP Memory Buffer Size Register indicates the size of the DSP memory buffer assigned to this Endpoint.

Table 8-32. DSP Memory Buffer Size Register

	SZ[15:0]						Memory Buffer Size
15		14	13	12	11	10		9	8	7	6	5	4	3	2	1	0
RD		RD	RD	RD	RD	RD		RD	RD	RD	RD	RD	RD	RD	RD	RD	RD

Figure 8-20. DSP Memory Buffer RD Pointer Offset Register

The DSP Memory Buffer RD Pointer Offset Register provides the offset from the base address for the read pointer of the memory buffer assigned to this Endpoint.

Table 8-33. DSP Memory Buffer RD Pointer Offset Register

RD[15:0]					Memory Buffer RD Offset
15	14	13	12	11		10	9	8	7	6	5	4	3	2	1	0
WR	WR	WR	WR	WR		WR	WR	WR	WR	WR	WR	WR	WR	WR	WR	WR

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39

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