Проектирование цифрового автомата в САПР OrCAD 9.1 и Active-HDL 8.1, страница 12

                             A0 : in STD_LOGIC;

                             A1 : in STD_LOGIC;

                             A2 : in STD_LOGIC;

                             A3 : in STD_LOGIC;

                             A4 : in STD_LOGIC;

                             A5 : in STD_LOGIC;

                             CS : in STD_LOGIC;

                             Q0 : out STD_LOGIC;

                             Q1 : out STD_LOGIC;

                             Q2 : out STD_LOGIC;

                             Q3 : out STD_LOGIC;

                             Q4 : out STD_LOGIC;

                             Q5 : out STD_LOGIC;

                             Q6 : out STD_LOGIC;

                             Q7 : out STD_LOGIC     

                   );

end PAM;

--}} End of automatically maintained section

architecture PAM of PAM is         

signal A : std_logic_vector(5 downto 0);

signal Q : std_logic_vector(7 downto 0);

begin

              A(0)<=A0;A(1)<=A1;A(2)<=A2;A(3)<=A3;A(4)<=A4;A(5)<=A5;

              process(A,CS)

              begin

                            if(CS='1') then  Q<="ZZZZZZZZ";

                            else

                            case A is

                            when "000000" => Q<="10101001";             

                            when "000001" => Q<="10100110";                           

                            when "000011" => Q<="10011010";

                            when "000010" => Q<="10100101";           

                            when "000110" => Q<="10010101";           

                            when "000111" => Q<="01101010";           

                            when "000101" => Q<="10010110";

                            when "000100" => Q<="10011001";

                            when "001100" => Q<="01011001";           

                            when "001101" => Q<="10101010";

                            when "001111" => Q<="10101010";

                            when "001110" => Q<="10101010";           

                            when "001010" => Q<="01100101";

                            when "001011" => Q<="01011010";

                            when "001001" => Q<="01100110";

                            when "001000" => Q<="01101001";

                            when "010000" => Q<="10101001";             

                            when "010001" => Q<="10100110";                           

                            when "010011" => Q<="10011010";

                            when "010010" => Q<="10100101";           

                            when "010110" => Q<="10010101";           

                            when "010111" => Q<="01101010";           

                            when "010101" => Q<="10010110";

                            when "010100" => Q<="10011001";

                            when "011100" => Q<="01011001";           

                            when "011101" => Q<="10101010";

                            when "011111" => Q<="10101010";