Address |
Name |
Reset |
Comments |
0x23-0x20 |
Base Address5 |
0x0 |
Unimplemented |
0x27-0x24 |
Base Address 6 |
0x0 |
Unimplemented |
0x2B-0x28 |
Cardbus CIS Pointer |
0x1FE03 |
CIS RAM Pointer - Function 1 (Read Only). |
0x2D-0x2C |
Subsystem Vendor ID |
0x11D4 |
Writable from the DSP during initialization |
0x2F-0x2E |
Subsystem Device ID |
0x219A |
Writable from the DSP during initialization |
0x33-0x30 |
Expansion ROM Base Address |
0x0 |
Unimplemented |
0x34 |
Capabilities Pointer |
0x40 |
Read-only |
0x3C |
Interrupt Line |
0x0 |
|
0x3D |
Interrupt Pin |
0x1 |
Uses INTA Pin |
0x3E |
Min_Gnt |
0x1 |
Read-only |
0x3F |
Max_Lat |
0x4 |
Read-only |
0x40 |
Capability ID |
0x1 |
Power Management Capability Identifier |
0x41 |
Next_Cap_Ptr |
0x0 |
Read-only |
0x43-0x42 |
Power Management Capabilities |
0x6C22 |
Writable from the DSP during initialization |
0x45-0x44 |
Power Management Control/Status |
0x0 |
Bits 15 and 8 initialized only on power-up. |
Table B-30. PCI Configuration Space for Function 2
Address |
Name |
Reset |
Comments |
0x01-0x00 |
Vendor ID |
0x11D4 |
Writable from the DSP during initialization |
0x03-0x02 |
Device ID |
0x219E |
Writable from the DSP during initialization |
0x05-0x04 |
Command Register |
0x0 |
Bus Master, Memory Space Capable, I/O Space Capable |
0x07-0x06 |
Status Register |
0x0 |
Bits enabled: Capabilities List, Fast B2B, Medium Decode |
0x08 |
Revision ID |
0x0 |
Writable from the DSP during initialization |
0x0B-0x09 |
Class Code |
0x040100 |
Writable from the DSP during initialization |
0x0C |
Cache Line Size |
0x0 |
Read-only |
0x0D |
Latency Timer |
0x0 |
Read-only |
0x0E |
Header Type |
0x80 |
Multifunction bit set |
0x0F |
BIST |
0x0 |
Unimplemented |
0x13-0x10 |
Base Address 1 |
0x08 |
Register Access for all ADSP-2192 Registers, Prefetchable Memory |
0x17-0x14 |
Base Address 2 |
0x08 |
24-bit DSP Memory Access |
0x1B-0x18 |
Base Address 3 |
0x08 |
16-bit DSP Memory Access |
0x1F-0x1C |
Base Address 4 |
0x01 |
I/O access for control registers and DSP memory |
Table B-30. PCI Configuration Space for Function 2 (Continued)
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