Sources for Additiona l Information. Emulator Pin Descriptions (Continued). Clock Signals. Mechanism for booting on the ADSP-2192

11 SYSTEM DESIGN

Figure 11-0.

Table 11-0.

Listing 11-0.

O ve rvie w

This chapter describes the basic system interface features of the ADSP-219x family processors, including the ADSP-2192. The system interface includes various hardware and software features used to control the DSP processor. Processor control pins include a PORST (power on reset) signal, clock signals, flag inputs and outputs, and interrupt requests. This chapter describes only the logical relationships of control signals; consult individual processor data sheets (including the data sheet for the ADSP-2192) for actual timing specifications.

Sourc e s for A d d itiona l Inform a tion

Some ADSP-2192 system interfaces are documented in other chapters in this book, as follows:

•  “Host (PCI/USB) Port” on page 8-1 discusses the PCI, CardBus, and Sub-ISA interfaces, and includes information about how these applications use the Serial EEPROM port and the DMA (Direct Memory Access) controller. That chapter also discusses the USB interface and includes information about how USB applications use the Serial EEPROM port and the DMA controller.

•  “AC’97 Codec Port” on page 9-1 discusses the AC’97 interface.

•  “JTAG Test-Emulation Port” on page 10-1 discusses the JTAG Test Access Port and how it is used during emulation.

Sourc e s for A dditiona l Inform a tion

In addition, the Analog Devices web site contains a series of engineering application notes. These documents describe topics related to the ADSP-2192, including:

•  Hints for porting code from ADSP-218x chips to ADSP-219x chips (described in application note EE-121)

•  Tips for maximizing performance on the ADSP-219x family of processors (described in application note EE-122)

•  An overview of the ADSP-219x pipeline (described in application note EE-123),

•  Mechanism for booting on the ADSP-2192 (described in application note EE-124).

Engineering application notes, including any new ones that may have been added since this manual was published, are available at www.analog.com.

Pin De sc rip tions

The ADSP-2192 processor comes in a 144-LQFP package configuration. This section provides functional descriptions of the ADSP-2192 pins.

Table 11-1 through Table 11-7 provide ADSP-2192 processor pin descriptions.

Table 11-1. PCI/USB Bus Interface Pin Descriptions

Pin De sc riptions

Table 11-1. PCI/USB Bus Interface Pin Descriptions (Continued)

Table 11-2. Crystal/Configuration Pin Descriptions

Table 11-3.  AC’97 Interface Pin Descriptions