Sources for Additiona l Information. Emulator Pin Descriptions (Continued). Clock Signals. Mechanism for booting on the ADSP-2192, страница 2

Pin Name(s)

Number

of Pins

I/O

Description

ACRST

1

O

AC’97 Reset

ACVAUX

1

I

AC’97 Vaux Input

ACVDD

1

I

AC’97 VDD Input

BITCLK

1

O

AC’97 Bit Clock

SDI0 - SDI2

3

I

AC’97 Serial Data Input

SDO

1

O

AC’97 Serial Data Output

SYNC

1

O

AC’97 Sync

Pin Name(s)

Number

of Pins

I/O

Description

SCK

1

I

Serial EEPROM Clock

SDA

1

I

Serial EEPROM Data

SEN

1

I

Serial EEPROM Enable

Pin Name(s)

Number

of Pins

I/O

Description

EMU

1

O

Emulator Event Pin

TCK

1

I

Emulator Clock Input

TDI

1

I

Emulator Data Input

Pin Name(s)

Number

of Pins

I/O

Description

TDO

1

O

Emulator Data Output

TMS

1

I

Emulator Mode Select

TRST

1

I

Emulator Logic Reset

Pin Name(s)

Number

of Pins

I/O

Description

AIOGND

2

IO Ground

IO0 - IO7

8

I/O

IO Pin, Bits 0-7

IOVDD

2

IO Vdd

Pin Name(s)

Number

of Pins

I/O

Description

ACVAUX

1

AC’97 VAUX Input

AIOGND

1

IO Ground

AVDD

1

Analog VDD Supply

CTRLAUX

1

AUX Control

CTRLVDD

1

Control VDD

IGND

9

Digital Ground

Pin Name(s)

Number

of Pins

I/O

Description

IVDD

9

Digital VDD

RVAUX

1

AUX supply

RVDD

1

Analog VDD Supply