HGTD8P50G1,
HGTD8P50G1S
May 1996 8A, 500V P-Channel IGBTs
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures. File Number 3649.2
Copyright © Harris Corporation 1996
Specifications HGTD8P50G1, HGTD8P50G1S
Electrical Specifications TC = +25oC, Unless Otherwise Specified
NOTE: 1. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). The HGTD8P50G1 and HGTD8P50G1S were tested per JEDEC standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. Turn-On losses include diode losses. |
Operating Frequency Information Handling Precautions for IGBTs Operating frequency information for a typical device (Figure Insulated Gate Bipolar Transistors are susceptible to gate10) is presented as a guide for estimating device performance insulation damage by the electrostatic discharge of energy for a specific application. Other typical frequency vs collector through the devices. When handling these devices, care current (ICE) plots are possible using the information shown should be exercised to assure that the static charge built in for a typical unit in Figure 7, Figure 8 and Figure 9. The oper- the handler’s body capacitance is not discharged through ating frequency plot (Figure 10) of a typical device shows the device. With proper handling and application procedures, fMAX1 or fMAX2 whichever is smaller at each point. The infor- however, IGBTs are currently being extensively used in mation is based on measurements of a typical device and is production by numerous equipment manufacturers in bounded by the maximum rated junction temperature. military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs fMAX1 is defined by fMAX1 = 0.05/tD(OFF)I. tD(OFF)I deadtime can be handled safely if the following basic precautions are (the denominator) has been arbitrarily held to 10% of the ontaken: state time for a 50% duty factor. Other definitions are possible. tD(OFF)I is defined as the time between the 90% 1. Prior to assembly into a circuit, all leads should be kept point of the trailing edge of the input pulse and the point shorted together either by the use of metal shorting where the collector current falls to 90% of its maximum springs or by the insertion into conductive material such value. Device Turn-Off delay can establish an additional fre- as “†ECCOSORBD LD26” or equivalent. quency limiting condition for an application other than TJMAX. 2. When devices are removed by hand from their carriers, tD(OFF)I is important when controlling output ripple under a the hand being used should be grounded by any suitable lightly loaded condition. fMAX2 is defined by fMAX2 = (PD - means - for example, with a metallic wristband. PC)/EOFF. The allowable dissipation (PD) is defined by PD = 3. Tips of soldering irons should be grounded. (TJMAX - TC)/RθJC. The sum of device switching and conduc- 4. Devices should never be inserted into or removed from tion losses must not exceed Pd. A 50% duty factor was used circuits with power on. (Figure 10) and the conduction losses (Pc) are approximated by Pc = (VCE • ICE)/2. EOFF is defined as the integral of the 5. Gate Voltage Rating - Never exceed the gate-voltage instantaneous power loss starting at the trailing edge of the rating of VGEM. Exceeding the rated VGE can result in perinput pulse and ending at the point where the collector manent damage to the oxide layer in the gate region. current equals zero (ICE = 0A). 6. Gate Termination - The gates of these devices are The switching power loss (Figure 10) is defined as fMAX2 • essentially capacitors. Circuits that leave the gate open-circuited or floating should be avoided. These conditions EOFF. Turn-On switching losses are not included because can result in Turn |
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