Design Note DN-8. Application Circuits. The circuit descriptions below assume some familiarity with the functioning of TOPSwitch, страница 4

            V       =(           (      ))  NS − VD3        (2)

               OUT        5 7. V + VD2 + IC ×15 ×      

                                                             NB

The TOPSwitch control current (IC) has a range of 2.5 mA minimum at maximum duty cycle to 6.5 mA for minimum duty cycle.  The control current and impedance terms introduce a variation of around 1% in the final value of the output voltage. This can be ignored or taken into account with an approximate midrange value for control current (IC) of 5 mA when choosing component values to set the output voltage of the supply.

Factors Affecting Line and Load Regulation

In the circuit example of Figure 2, a relatively high value of Zener voltage (22 V) was selected for VR2.  There are two reasons behind this choice.  The first is that use of accurate Zener with voltage of several times the TOPSwitch control voltage will tend to reduce the effect of variations in the value of the 5.7 V CONTROL pin voltage of TOPSwitch, since the TOPSwitch  control voltage will be less of a factor in determining the output voltage as compared to VR2.  A 1% tolerance Zener can be selected to further tighten the absolute tolerance of the output voltage for this circuit.  Higher voltage Zeners also tend to have a sharper “knee” in their V-I characteristic than low voltage Zeners.  This provides higher gain in the control loop for tighter control of load regulation, since a sharper breakdown characteristic will result in a larger change of current into the control pin of U1 for a given change in bias voltage.  This is borne out by the load regulation of the circuit in Figure 2.  The high value of bias voltage also tends to provide a pre-load to the supply when the output load is small.  When the output load on the supply is reduced to a small value, the feedback control circuit will source current into the CONTROL pin in order to maintain regulation.  Since the bias voltage is relatively high, the current sourced into the CONTROL pin represents a substantial amount of power (almost 200 mW if minimum output duty cycle is programmed).  This loads the supply and tends to curb output voltage rise for low or zero load conditions.


For optimum load regulation, a value of transformer primary inductance should be chosen such that the power supply remains in the continuous mode over as much of its specified input line and output load range as possible.  For a flyback supply operating in the continuous mode, the duty cycle is independent of output load to a first order, and varies only in response to input voltage.  This is important because of the effect of variations in TOPSwitch control current on the output voltage of the supply.  These effects are represented by the Zener impedance terms and the TOPSwitch control impedance terms in Equations (1) and (2) above.  The product of IC and the various circuit impedances forms an error term that causes regulation to be less than perfect.  Since the CONTROL pin input current IC must vary to control the duty cycle, any change in duty cycle will cause a change in the voltage drop across the Zener and/or TOPSwitch input dynamic impedance, causing a shift in output voltage and a consequent deterioration in load regulation.  If the power supply operates in the discontinuous mode, its operating duty cycle will be a strong function of output loading.  This means that the TOPSwitch control current will also vary with load, and regulation will suffer.  The circuit of Figure 2 can be used as an example.  It uses a 22 V Zener to set the output voltage in conjunction with the TOPSwitch control voltage.  The impedance of a typical 22 V Zener (1N5251) is 30 Ω.  The TOPSwitch CONTROL pin dynamic impedance is 15 Ω.  From the TOPSwitch data sheet, it can be found that the TOPSwitch control function dynamic range is 4 mA.  This is the control current required to drive the TOPSwitch duty cycle from maximum to minimum.  The variation in the reference voltage due to this current is:

∆VREF = ∆IC ×(15 + ZVR2)

∆VREF = 4mA × 45Ω= 180mV

This will cause an output voltage change of:

(3)

N

∆VOUT = ∆VREF × S

NB

(4)