Sample And Hold. Sampled Data, Replication, Sinx/x. Ideal Sampling. System View of Aliasing

remains at the last sampled ^V_in, this is the hold phase. ^V_out

follows V_c. The opamp is required so further stages can be driven without discharging C. Input resistance of MOS opamp is nearly infinite.

Right at the input, v_in may be a continuous analog signal.

v_c has continuous sections while φ is high and is held while φ is low. The held voltage is the voltage on v_in at the end of the φ high time, so that is the sample point.

The next stage will sample at the end of the “held”  time and as a result, all contin-

          continuous and sampled       pure sampled

Thus ^φ₁ samples and holds the value at the end of ^φ₁.

Then ^φ₂ goes high and the constant value of v_o is sampled. The opamp goes through transients, etc, and at the end of ^φ₂ the sample is valid, and can be passed on to the

Thus the continuous analog input has been converted to a purely sampled output at v₂. Note that each stage has delay of half a clock period associated with it. In other words, when v₂ is valid, the voltage represents the input sampled half a clock period ago. Thus, we could say that v_{2 n} = v_{i n –1 ⁄ 2}, where ^v_{2 n} is ^v₂ at time now, and ^v_{i n –1 ⁄ 2} is ^v_i half a clock period in the past. The subscripts n, n-1/2, n-1 represent time now, half a clock period ago and 1 clock period ago.

Sampled Data, Replication, Sinx/x

Conversion of a continuous signal into a sampled signal involves replication and aliasing. The conversion of a sampled signal into a continuous signal involves sinx/x.

Ideal Sampling

This is equivalent to multiplying the signal by an infinite succession of impulses of height 1 in the time domain.

In the frequency domain, the series of pulses in the time domain is equivalent to an infinite series of pulses in the frequency domain separated by 1/T.

Thus, there is an impulse at DC, one at f _clock which above is labelled f _s for sampling frequency, one at

2 f _s , 3 f _s etc. Each of these represents a sine wave at that particular frequency, either at DC or a multiple of the clock frequency. Multiplication in the time domain is equivalent to convolution in the frequency domain. Fortunately, convolution with a series of impulses is equivalent to multiplying the input spectrum by each of the impulses. Thus the input is multiplied by each multiple of the clock frequency producing sum and difference frequencies around each of the clock multiples. Note that multiplying two sine waves together is sometimes also referred to as mixing.

Replication

Pure sampling is equivalent to multiplying a continuous signal by a train of impulses in the time domain, separated by T. (Here, T is the period of the sampling frequency f _s .) The resulting spectrum in the frequency domain, is a set of impulses (frequency components) separated by 1/T, the clock frequency. The outputs occur atn f _s ± f _in. This is called replication.

                                                                                                                                                                   f _s – f _i f + f

inputinput

XXf

samplesample

                                                                                                                                 fs     2fs    3fs

Thus an input signal, when sampled is replicated around multiples of the clock frequency (To infinity for ideal sampling). Note that at the output, one cannot tell which of the frequencies was the actual input frequency. For example, 1 kHz sampled by 8 kHz replicates to 1 kHz, 7 kHz, 9 kHz, 15 kHz, 17 kHz etc. An input signal at 15 kHz would have exactly the same output spectrum.

Aliasing

If a S.C. filter is built at baseband, frequencies input close to n f _s will