Prelminary technical data. Preliminary Technical Data AD9858. Integrated Programmable Charge Pump and Phase

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PRELMINARY TECHNICAL DATA

1 GSPS a  Direct Digital Synthesizer

Preliminary Technical Data   AD9858

FEATURES

1 GSPS Internal Clock Speed

Up to 2GHz Input Clock (selectable divide by 2)

Integrated 10-bit D/A Converter

Phase Noise <130 dBc/Hz @ 1 kHz Offset (DAC output) 32-bit Programmable Frequency Register

Simplified 8-bit parallel and SPI Serial Control Interface

Automatic Frequency Sweeping capability

4 Frequency Profiles

3.3V Power Supply

Power Dissipation <2 Watts

100-lead EPAD-TQFP package

Integrated Programmable Charge Pump and Phase

  Frequency Detector with Fast Lock Circuit

Isolated Charge Pump Supply up to 5V

Integrated 2GHz Mixer

APPLICATIONS

VHF/UHF-LO Synthesis

Tuners

Instrumentation

Agile Clock Synthesis

Cellular Basestation Hopping Synthesizer

Radar

Sonet/SDH Clock Synthesis

REV PrB 1/28/2003                                                                                                                  

Information furnished by Analog Devices is believed to be accurate and               One Technology Way, P.O. Box 9106 Norwood MA 02062-9106, USA reliable. However, no responsibility is assumed by Analog Devices for its                Tel: 781/329-4700   www.analog.com use, nor for any infringements of patents or other rights of third parties that          Fax: 781/326-8703 Analog Devices, Inc. 2003 may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

CONTENTS

FEATURES                                                                                                      1

APPLICATIONS                                                                                                 1

Functional Block Diagram 1 GENERAL DESCRIPTION      3

ABSOLUTE MAXIMUM RATINGS *                                                           3

AD9858 PRELIMINARY ELECTRICAL SPECIFICATIONS                          4

EXPLANATION OF TEST LEVELS                                                             6

AD9858 Pinout                                                                                              7

Pin Function Descriptions                                                                               8

Theory of Operation                                                                                     10

Overview                                                                                                 10

Component Blocks                                                                                   11

DDS Core                                                                                            11

DAC Output                                                                                         11

PLL Frequency Synthesizer                                                                   11

Phase-Frequency Detector                                                                     12

Charge Pump                                                                                       12

Fast Locking Logic                                                                               13

Analog Mixer                                                                                       15

Modes of Operation                                                                                  15

Single-Tone Mode                                                                                16

Frequency-Sweeping Mode                                                                   17

Returning to starting frequency                                                          18

Full Sleep Mode                                                                                   19

Synchronization                                                                                       19

SYNCLK and FUD Pins                                                                       19

I/O Synchronization Block Diagram                                                       20

I/O Synchronization Timing Diagram                                                     20

Programming the AD9858                                                                        20

I/O Port Functionality                                                                           21

PARALLEL Programming Mode                                                       21

SERIAL Programming Mode                                                             22

Register Map                                                                                        23

Register Bit Descriptions                                                                       25

Control Function Register (CFR)                                                        25

Other Registers                                                                                 28

Delta Frequency Tuning Word (DFTW)                                          28

Delta Frequency Ramp Rate Word  (DFRRW)                                 29

User Profile Registers                                                                    29

User Profiles                                                                                        29


Frequency Tuning Control

30

Phase Offset Control

30

Profile Selection

30

AD9858 Application Suggestions

32

Evaluation Boards:

34

GENERAL DESCRIPTION

The AD9858 is a Direct Digital Synthesizer (DDS) featuring a 

10-bit DAC operating up to 1GSPS. The AD9858 uses advanced DDS technology, coupled with an internal high-speed, high performance D/A converter to form a digitally-programmable, complete high-frequency synthesizer capable of generating a frequency-agile analog output sinewave at up to 400+ MHz. The AD9858 is designed to provide fast frequency hopping and fine tuning resolution (32-bit frequency tuning word).  The frequency tuning and control words are loaded into the AD9858 via parallel (8-bit) or serial loading formats. The AD9858 contains an Integrated Charge Pump (CP) and Phase Frequency Detector

ABSOLUTE MAXIMUM RATINGS *

Maximum Junction Temp ................................+150° C

AVDD........................................................................ +4 V

DVDD........................................................................ +4 V  CPVDD...................................................................... +6 V Digital Input Voltage..............................-0.7 V to +VDD

Digital Output Current......................................... 5 mA Storage Temperature........................-65° C to +150° C Operating Temp..................................-40° C to +85° C Lead Temp. (10 sec. soldering).........................+300° C θJA......................................................................25° C/W θJC.................................................................... tbd° C/W  (PFD) for synthesis applications requiring the combination

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