5. One of conditional vertex’s outputs may be connected with its input. In this case, the conditional vertex is called the recurrent vertex (Fig.26.3);
6. A conditional vertex is assigned with an element of the logic conditions set X, different conditional vertices may be assigned with the same element;
7. An operational vertex is assigned with an operator (a microcommand) Yt={yt1,…,yt2}, ytuÎY, u=1,…,ut – a subset of the microoperations set Y. Different operational vertices may be assigned with the same element. If ut=0, the set Yt is empty. In this case, an operational vertex is assigned with empty operator (the idling operator).
Executing of the GSA is started with the initial vertex Y0 always and it has to be finished in the finishing vertex Yk. A particular path through algorithm’s vertices is determined by the values of the logic conditions.
For example, if x1=0, x2=1, the operators Y1, Y3, Y4, Yk will be executed one after another.
If x1=0, x2=0, x3=0, the sequence of execution is Y0, Y2, Y4, Yk.
If x1=0, after the operator Y0, the operator Y1 will be executed until the signal x1 will change its value.
Aided with recurrent vertices, the waiting mode may be simulated.
It should be noted, a device performing the operator Y1 starts to perform the next operator Y3 if the conditions x1=1, x2=1, x3=1 (the conjunction ) hold true. The operator Y4 will be performed if the conditions x1=1, x2=1, x3=0 (the conjunction ) hold true. So, each path in the GSA is corresponded with a conjunction of conditions.
Consider a GSA with the initial vertex Y0, the finishing vertex Yk and T operational vertices T={ Y1, Y2, …, YT }.
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