** Profile: "SCHEMATIC1-bias" [ F:\WorksAlek\MATMOD\2S\L3\lab_3-pspicefiles\schematic1\bias.sim ]
**** Digital Input MODEL PARAMETERS
******************************************************************************
DIN74
S0NAME 0
S0TSW 3.500000E-09
S0RLO 7.13
S0RHI 389
S1NAME 1
S1TSW 5.500000E-09
S1RLO 467
S1RHI 200
S2NAME X
S2TSW 3.500000E-09
S2RLO 42.9
S2RHI 116
S3NAME R
S3TSW 3.500000E-09
S3RLO 42.9
S3RHI 116
S4NAME F
S4TSW 3.500000E-09
S4RLO 42.9
S4RHI 116
S5NAME Z
S5TSW 3.500000E-09
S5RLO 200.000000E+03
S5RHI 200.000000E+03
**** 03/14/07 15:04:46 ******* PSpice 10.5.0 (Jan 2005) ******* ID# 2089878865
** Profile: "SCHEMATIC1-bias" [ F:\WorksAlek\MATMOD\2S\L3\lab_3-pspicefiles\schematic1\bias.sim ]
**** Digital Output MODEL PARAMETERS
******************************************************************************
DO74
TIMESTEP 100.000000E-12
S0NAME X
S0VHI 2
S0VLO .8
S1NAME 0
S1VHI .8
S1VLO -1.5
S2NAME R
S2VHI 1.4
S2VLO .8
S3NAME R
S3VHI 2
S3VLO 1.3
S4NAME X
S4VHI 2
S4VLO .8
S5NAME 1
S5VHI 7
S5VLO 2
S6NAME F
S6VHI 2
S6VLO 1.3
S7NAME F
S7VHI 1.4
S7VLO .8
**** 03/14/07 15:04:46 ******* PSpice 10.5.0 (Jan 2005) ******* ID# 2089878865
** Profile: "SCHEMATIC1-bias" [ F:\WorksAlek\MATMOD\2S\L3\lab_3-pspicefiles\schematic1\bias.sim ]
**** Digital Gate MODEL PARAMETERS
******************************************************************************
D_02 D_08 D_04 D_00
TPLHMN 4.800000E-09 7.000000E-09 4.800000E-09 4.400000E-09
TPLHTY 12.000000E-09 17.500000E-09 12.000000E-09 11.000000E-09
TPLHMX 22.000000E-09 27.000000E-09 22.000000E-09 22.000000E-09
TPHLMN 3.200000E-09 4.800000E-09 3.200000E-09 2.800000E-09
TPHLTY 8.000000E-09 12.000000E-09 8.000000E-09 7.000000E-09
TPHLMX 15.000000E-09 19.000000E-09 15.000000E-09 15.000000E-09
**** 03/14/07 15:04:46 ******* PSpice 10.5.0 (Jan 2005) ******* ID# 2089878865
** Profile: "SCHEMATIC1-bias" [ F:\WorksAlek\MATMOD\2S\L3\lab_3-pspicefiles\schematic1\bias.sim ]
**** Digital IO MODEL PARAMETERS
******************************************************************************
IO_STD
DRVL 104
DRVH 96.4
AtoD1 AtoD_STD
AtoD2 AtoD_STD_NX
AtoD3 AtoD_STD
AtoD4 AtoD_STD_NX
DtoA1 DtoA_STD
DtoA2 DtoA_STD
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