Проектирование цифрового автомата в САПР OrCAD 9.1 и Active-HDL 8.1, страница 6

Q<=TEMP_QV; 

end \M14-DR_FUNC\;

 Результаты верификации функциональной VHDL-модели представлены на рисунке 10.

Разработка потоковой VHDL-модели цифрового автомата

Потоковые модели занимают промежуточное положение (нишу) между поведенческими и структурными моделями. Они используют информацию о структуре объекта, однако элементы структуры не оформляются в виде обособленных моделей, как это делается для структурной модели объекта.

library IEEE;

use IEEE.STD_LOGIC_1164.all;

use IEEE.std_logic_unsigned.all;

entity \M14-DR_POT\ is

               port(

                             M : in STD_LOGIC;

                             R : in STD_LOGIC;

                             C : in STD_LOGIC;

                             DR : in STD_LOGIC;

                             Q: out STD_LOGIC_VECTOR(3 downto 0)

                   );

end \M14-DR_POT\;

architecture \M14-DR_POT\ of \M14-DR_POT\ is

signal F1,F2,F3,F4,F5,F6,F7,F8,F9,F10,F11,F12,F13,F14,F15,F16,F17,F18,F19,F20,F21,F22,F23,F24,F25,F26,F27,J0,

J1,J2,J3,K0,K1,K2,K3,NQ0,NQ1,NQ2,NQ3: std_logic;

signal QP:std_logic_vector(3 downto 0);

begin

              NQ0<=not QP(0);

              NQ1<=not QP(1);

              NQ2<=not QP(2);

              NQ3<=not QP(3);            

              F1<=not (NQ0 and NQ1)                after 11ns;

              F2<=not (NQ0 and NQ2)                after 11ns;

              F3<=not (NQ0 and NQ3)                after 11ns;            

              F4<=not (QP(1) and NQ3 and NQ0)             after 11ns;

              F5<=not (QP(1) and NQ2 and NQ0)             after 11ns;

              F6<=not (QP(0) and NQ3 and NQ1)             after 11ns;

              F7<=not (QP(0) and NQ2 and NQ1)             after 11ns;          

              F8<=not (QP(1) and NQ2 and QP(0))           after 11ns;

              F9<=not (QP(2) and NQ0 and NQ1)             after 11ns;

              F10<=not (QP(2) and NQ0 and NQ3)           after 11ns;

              F11<=not (QP(2) and NQ3 and NQ1)           after 11ns;          

              F12<=not (QP(3) and NQ2)                                        after 11ns;

              F13<=not (QP(3) and NQ0 and NQ1)                         after 11ns;

              F14<=not (QP(0) and QP(1) and QP(2) and NQ3)     after 12ns;            

              F15<=not (F1 and F2 and F3)                       after 11ns;

              F16<=not (F4 and F5 and F6 and F7)           after 12ns;

              F17<=not (F8 and F9 and F10 and F11)       after 12ns;

              F18<=not (F12 and F13 and F14)                 after 11ns;

              F19<=not M                                                      after 12ns;

              F20<=not (M and QP(1))                                 after 11ns;

              F21<=not (F15 and F19)                                  after 11ns;

              F22<=not (M and QP(2))                                 after 11ns;

              F23<=not (F16 and F19)                                  after 11ns;

              F24<=not (M and QP(3))                                 after 11ns;

              F25<=not (F17 and F19)                                  after 11ns;

              F26<=not (M and DR)                                     after 11ns;

              F27<=not (F18 and F19)                                 after 11ns;

              J0<=not (F20 and F21)                                     after 11ns;         

              J1<=not (F22 and F23)                                     after 11ns;

              J2<=not (F24 and F25)                                     after 11ns;

              J3<=not (F26 and F27)                                   after 11ns;